Siwar Z.
EMBEDDED SOFTWARE DEVELOPER
370 dollar
Mon expérience
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Smile Open Source Solutions (Toulouse, France)September 2020 - November 2020
Building custom embedded Linux-based systems using the Yocto project :
- Integration and validation of "live broadcasting over a local network" application on a custom raspberry pi Linux-based system.
- Design and development of a the software for a product inspection system prototype with computer vision using OpenCV.
- Integration and validation of "live broadcasting over a local network" application on a custom raspberry pi Linux-based system.
- Design and development of a the software for a product inspection system prototype with computer vision using OpenCV.
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OROK Airport robotics (Isère, France)February 2019 - August 2019
Development and implementation of a calibration method for a pseudo-omnidirectional robot in order to enhance its relative positioning accuracy without closed control loops.
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Deutsche Gesellschaft für Internationale Zusammenarbeit (GIZ) GmbHAugust 2018 - February 2019
This career development program project was implemented in partnership between the Ministry of Higher Education and Scientific Research and the Deutsche Gesellschaft für Internationale Zusammenarbeit (GIZ), through its regional program EconoWin, on behalf of the Federal Ministry for Economic Cooperation and Development (BMZ). During this program, a group of highly selected senior year university female students were mentored through different workshops and activities to improve thier interpersonal, communications,managements and leadership skills in order to prepare them to become efficient future managers.
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Mentor Graphics (Tunis, Tunisia)June 2018 - July 2018
Extension and validation of a software and hardware environment for Tree Based eFPGA architecture:
-Studying an eFPGA implementation design flow and the specifications of a tree based FPGA architecture
-Adding features for a C++ based VPR tool (Virtual Rooting and Placement) as well as VHDL Generator for Tree Based embeddedFPGAs to generate a more suitable configuration bitstream.
-Developing of a Verilog Generator (a software which provides a Verilog files describing the eFPGA hardware main components) based on a VHDL Generator.
-Testing several case scenarios in order to compare the performance of different features.
-Studying an eFPGA implementation design flow and the specifications of a tree based FPGA architecture
-Adding features for a C++ based VPR tool (Virtual Rooting and Placement) as well as VHDL Generator for Tree Based embeddedFPGAs to generate a more suitable configuration bitstream.
-Developing of a Verilog Generator (a software which provides a Verilog files describing the eFPGA hardware main components) based on a VHDL Generator.
-Testing several case scenarios in order to compare the performance of different features.
Mes compétences
Yocto, VHDL, Verilog, UART, SPI, Software Development, Robotics, Python, OpenCV, Linux embedded, Linux, Labview, Git, FPGA, Ethernet, Embedded Systems, C/C++, C++
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